As a method for mounting two semiconductor elements (hereinafter, referred to as “IC chips”) on a substrate, a structure in which both of the two IC chips are connected electrically via bumps, etc., has been adopted. Hereinafter, this structure is called “a chip-on-chip structure.” By adopting such a structure, it is possible to make the size of the substrate small in comparison with a case where each IC chip is mounted separately.
However, in a semiconductor device of chip-on-chip structure, there is a problem that the thickness becomes large, because it has a construction in which IC chips 151 and 152 are simply stacked on a substrate 153 as shown in FIG. 15, for example.
Further, the wiring pattern (not illustrated) formed onto the substrate 153 needs to be connected with the IC chip 151 by a wire 154 made of metal or the like, because the surface of the IC chip 151 on which electrodes are provided does not face the substrate. As a result, when a high-frequency signal is handled in particular, there is also a problem that harmful effects caused by the inductance component of the wire 154 (such as poor sensitivity and varying sensitivity) cannot be ignored.
On the other hand, in Japanese Patent Application Laid-open Publication No. 2002-83925, an integrated circuit device is disclosed as shown in FIG. 16. In the integrated circuit device, a first IC chip 161 and a second IC chip 162 are connected electrically via bumps 163, and a recess 165 enough to accommodate the second IC chip 162 is formed on a surface of a substrate 164. And the first IC chip 161 and the substrate 164 are connected electrically at a position where the second IC chip 162 is situated in the recess 165. In this integrated circuit device, the second IC chip 162 is located inside the recess, and the first IC chip 161 and the substrate 164 are connected without a wire. As a result, thinning can be achieved and the harmful influence by an inductance component which occurs in case of a circuit which handles a high-frequency signal can be reduced.
However, in the integrated circuit device in the above-mentioned Japanese Patent Application, heat tends to be accumulated around the first IC chip 161, and there is a problem that the heat radiation characteristics is not good.